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path: root/drivers/clk/tegra/clk-tegra124.c (follow)
Commit message (Expand)AuthorAgeFilesLines
* clk: tegra: Fix Tegra PWM parent clockJon Hunter2022-10-141-0/+1
* clk: tegra: Add missing of_node_put()Liang He2022-08-191-0/+1
* memory: tegra124-emc: Make driver modularDmitry Osipenko2021-01-051-3/+23
* clk: tegra: Fix initial rate for pll_a on Tegra124Thierry Reding2020-05-131-1/+1
* clk: tegra: Remove audio clocks configuration from clock driverSowjanya Komatineni2020-03-121-3/+2
* clk: tegra: Remove tegra_pmc_clk_init along with clk idsSowjanya Komatineni2020-03-121-23/+10
* clk: tegra: Remove CLK_M_DIV fixed clocksSowjanya Komatineni2020-03-121-4/+0
* clk: tegra: Add Tegra OSC to clock lookupSowjanya Komatineni2020-03-121-0/+2
* clk: tegra: Add support for OSC_DIV fixed clocksSowjanya Komatineni2020-03-121-0/+4
* clk: tegra: Reimplement SOR clock on Tegra124Thierry Reding2019-11-111-9/+13
* clk: tegra: Rename sor0_lvds to sor0_outThierry Reding2019-11-111-6/+6
* clk: tegra: Move SOR0 implementation to Tegra124Thierry Reding2019-11-111-0/+49
* treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner2019-05-301-12/+1
*-. Merge branches 'clk-stm32f4', 'clk-tegra', 'clk-at91', 'clk-sifive-fu540' and...Stephen Boyd2019-05-071-2/+1
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| | * clk: tegra124: Remove lock-enable bit from PLLMDmitry Osipenko2019-04-251-2/+1
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* / clk: core: replace clk_{readl,writel} with {readl,writel}Jonas Gorski2019-04-231-2/+2
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* clk: tegra: Fix maximum audio sync clock for Tegra124/210Jon Hunter2018-12-141-1/+8
* clk: tegra: Make vde a child of pll_c3Thierry Reding2018-07-091-1/+1
* clk: tegra: Make vic03 a child of pll_c3Thierry Reding2018-07-091-0/+1
* clk: tegra: Add quirk for getting CDEV1/2 clocks on Tegra20Dmitry Osipenko2018-05-181-1/+1
* clk: tegra: Specify VDE clock rateDmitry Osipenko2018-03-121-1/+1
* clk: tegra: Mark HCLK, SCLK and EMC as criticalDmitry Osipenko2018-03-121-4/+3
* clk: tegra: Add CEC clockPeter De Schrijver2017-03-201-0/+1
* clk: tegra: Initialize UTMI PLL when enabling PLLUAndrew Bresticker2016-06-301-154/+2
* clk: tegra: dpaux and dpaux1 are fixed factor clocksThierry Reding2016-04-281-0/+4
* clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rateRhyland Klein2015-11-201-30/+63
* clk: tegra: pll: Don't unconditionally set LOCK flagsRhyland Klein2015-11-201-9/+15
* clk: tegra: Constify pdiv-to-hw mappingsThierry Reding2015-11-201-5/+5
* clk: tegra: Format tables consistentlyThierry Reding2015-11-181-184/+186
* clk: tegra: Miscellaneous coding style cleanupsThierry Reding2015-11-181-3/+3
* clk: tegra: Fix 26 MHz oscillator frequencyThierry Reding2015-11-181-1/+1
* clk: tegra: Modify tegra_audio_clk_init to accept more pllsRhyland Klein2015-10-201-1/+7
* clk: tegra: Fix some static checker problemsStephen Boyd2015-08-261-4/+4
* Merge tag 'tegra-for-4.3-clk' of git://git.kernel.org/pub/scm/linux/kernel/gi...Stephen Boyd2015-08-261-0/+82
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| * clk: tegra: Save/restore CCLKG_BURST_POLICY on suspendTuomas Tynkkynen2015-07-161-0/+14
| * clk: tegra: Add DFLL DVCO reset control for Tegra124Paul Walmsley2015-07-161-0/+68
* | clk: tegra: Properly include clk.hStephen Boyd2015-07-201-1/+0
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* clk: tegra: Set the EMC clock as the parent of the MC clockTomeu Vizoso2015-05-131-12/+1
* clk: tegra: Add EMC clock driverMikko Perttunen2015-05-131-1/+4
* clk: tegra: Remove old Tegra124 EMC clockMikko Perttunen2015-05-131-1/+0
* clk: tegra: Use the proper parent for plld_dsiThierry Reding2015-04-101-6/+8
* clk: tegra: Model oscillator as clockThierry Reding2015-04-101-1/+2
* clk: tegra: Enable HDA to HDMI clocks on Tegra124Dylan Reid2015-04-101-0/+5
* clk: tegra: Define PLLD_DSI and remove dsia(b)_muxMark Zhang2015-02-021-20/+16
* clk: tegra: Add support for the Tegra132 CAR IP blockPaul Walmsley2015-02-021-9/+121
* clk: tegra124: Add init data for dsi lp clocksSean Paul2015-02-021-0/+2
* clk: tegra: Implement memory-controller clockThierry Reding2014-11-261-1/+6
* clk: tegra124: Add PLL_M_UD and PLL_C_UD clocksMikko Perttunen2014-09-181-0/+8
* clk: tegra124: init table updatesPeter De Schrijver2014-06-271-0/+6
* clk: tegra: Add SATA clocks to Tegra124 initialization tableMikko Perttunen2014-06-251-0/+2
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-30 04:05:46 +0100