Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | clk: mxl: syscon_node_to_regmap() returns error pointers | Rahul Tanwar | 2022-10-27 | 1 | -1/+1 |
* | clk: mxl: Fix a clk entry by adding relevant flags | Rahul Tanwar | 2022-10-18 | 1 | -2/+2 |
* | clk: mxl: Remove redundant spinlocks | Rahul Tanwar | 2022-10-17 | 1 | -1/+0 |
* | clk: mxl: Switch from direct readl/writel based IO to regmap based IO | Rahul Tanwar | 2022-10-17 | 1 | -4/+9 |
* | clk: intel: Add CGU clock driver for a new SoC | Rahul Tanwar | 2020-05-27 | 1 | -0/+475 |