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acpi.c
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Commit message (
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Author
Age
Files
Lines
*
cxl: Add support for _DSM Function for retrieving QTG ID
Dave Jiang
2023-12-22
1
-3
/
+129
*
cxl: Export QTG ids from CFMWS to sysfs as qos_class attribute
Dave Jiang
2023-10-28
1
-0
/
+3
*
cxl/acpi: Annotate struct cxl_cxims_data with __counted_by
Kees Cook
2023-09-22
1
-2
/
+2
*
cxl/acpi: Return 'rc' instead of '0' in cxl_parse_cfmws()
Breno Leitao
2023-07-18
1
-1
/
+1
*
cxl/acpi: Fix a use-after-free in cxl_parse_cfmws()
Breno Leitao
2023-07-18
1
-2
/
+1
*
Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl
Dan Williams
2023-06-26
1
-90
/
+116
|
\
|
*
cxl/acpi: Directly bind the CEDT detected CHBCR to the Host Bridge's port
Robert Richter
2023-06-25
1
-28
/
+63
|
*
cxl/acpi: Move add_host_bridge_uport() after cxl_get_chbs()
Robert Richter
2023-06-25
1
-45
/
+45
|
*
cxl/acpi: Probe RCRB later during RCH downstream port creation
Robert Richter
2023-06-25
1
-30
/
+21
*
|
cxl/port: Rename CXL_DECODER_{EXPANDER, ACCELERATOR} => {HOSTONLYMEM, DEVMEM}
Dan Williams
2023-06-25
1
-1
/
+1
|
/
*
Merge branch 'for-6.3/cxl-ram-region' into cxl/next
Dan Williams
2023-02-11
1
-1
/
+2
|
\
|
*
cxl/dax: Create dax devices for CXL RAM regions
Dan Williams
2023-02-11
1
-1
/
+2
*
|
Merge branch 'for-6.3/cxl' into cxl/next
Dan Williams
2023-02-07
1
-1
/
+1
|
\
\
|
*
|
cxl: fix spelling mistakes
Randy Dunlap
2023-01-27
1
-1
/
+1
|
|
/
*
/
cxl/pmem: Fix nvdimm unregistration when cxl_pmem driver is absent
Dan Williams
2023-01-26
1
-1
/
+0
|
/
*
cxl: update names for interleave ways conversion macros
Dave Jiang
2022-12-06
1
-3
/
+3
*
cxl: update names for interleave granularity conversion macros
Dave Jiang
2022-12-06
1
-2
/
+2
*
cxl/acpi: Warn about an invalid CHBCR in an existing CHBS entry
Robert Richter
2022-12-06
1
-1
/
+2
*
cxl/acpi: Fail decoder add if CXIMS for HBIG is missing
Alison Schofield
2022-12-05
1
-0
/
+5
*
Merge branch 'for-6.2/cxl-xor' into for-6.2/cxl
Dan Williams
2022-12-05
1
-3
/
+134
|
\
|
*
cxl/acpi: Support CXL XOR Interleave Math (CXIMS)
Alison Schofield
2022-12-04
1
-3
/
+134
*
|
cxl/acpi: Extract component registers of restricted hosts from RCRB
Robert Richter
2022-12-03
1
-5
/
+46
*
|
cxl/ACPI: Register CXL host ports by bridge device
Robert Richter
2022-12-03
1
-18
/
+20
*
|
tools/testing/cxl: Make mock CEDT parsing more robust
Dan Williams
2022-12-03
1
-0
/
+4
*
|
cxl/acpi: Move rescan to the workqueue
Dan Williams
2022-12-03
1
-2
/
+15
*
|
cxl/acpi: Simplify cxl_nvdimm_bridge probing
Dan Williams
2022-12-02
1
-0
/
+1
*
|
cxl/acpi: Improve debug messages in cxl_acpi_probe()
Robert Richter
2022-11-14
1
-4
/
+8
*
|
cxl: Unify debug messages when calling devm_cxl_add_dport()
Robert Richter
2022-11-14
1
-5
/
+2
*
|
cxl: Unify debug messages when calling devm_cxl_add_port()
Robert Richter
2022-11-14
1
-2
/
+0
|
/
*
cxl/acpi: Minimize granularity for x1 interleaves
Dan Williams
2022-08-02
1
-0
/
+6
*
cxl/acpi: Autoload driver for 'cxl_acpi' test devices
Dan Williams
2022-08-02
1
-0
/
+7
*
cxl/port: Record parent dport when adding ports
Dan Williams
2022-07-22
1
-2
/
+1
*
cxl/core: Define a 'struct cxl_root_decoder'
Dan Williams
2022-07-21
1
-4
/
+36
*
cxl/acpi: Track CXL resources in iomem_resource
Dan Williams
2022-07-21
1
-3
/
+141
*
cxl/core: Define a 'struct cxl_switch_decoder'
Dan Williams
2022-07-21
1
-1
/
+3
*
cxl: Introduce cxl_to_{ways,granularity}
Dan Williams
2022-07-10
1
-15
/
+19
*
cxl/core: Drop ->platform_res attribute for root decoders
Dan Williams
2022-07-10
1
-7
/
+10
*
cxl/acpi: Add root device lockdep validation
Dan Williams
2022-04-28
1
-0
/
+13
*
cxl/core/port: Fix / relax decoder target enumeration
Dan Williams
2022-02-09
1
-1
/
+1
*
cxl/mem: Add the cxl_mem driver
Ben Widawsky
2022-02-09
1
-1
/
+2
*
cxl/core/port: Add switch port enumeration
Dan Williams
2022-02-09
1
-16
/
+1
*
cxl/core/port: Remove @host argument for dport + decoder enumeration
Dan Williams
2022-02-09
1
-1
/
+1
*
cxl/port: Add a driver for 'struct cxl_port' objects
Ben Widawsky
2022-02-09
1
-25
/
+1
*
cxl/core/hdm: Add CXL standard decoder enumeration to the core
Dan Williams
2022-02-09
1
-28
/
+15
*
cxl/core: Generalize dport enumeration in the core
Dan Williams
2022-02-09
1
-59
/
+8
*
cxl/pci: Rename pci.h to cxlpci.h
Dan Williams
2022-02-09
1
-1
/
+1
*
cxl/port: Up-level cxl_add_dport() locking requirements to the caller
Dan Williams
2022-02-09
1
-0
/
+2
*
cxl/port: Introduce cxl_port_to_pci_bus()
Dan Williams
2022-02-09
1
-5
/
+9
*
cxl: Prove CXL locking
Dan Williams
2022-02-09
1
-5
/
+5
*
cxl/core/port: Make passthrough decoder init implicit
Ben Widawsky
2022-02-09
1
-5
/
+0
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