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path: root/drivers/cxl/cxlpci.h (follow)
Commit message (Expand)AuthorAgeFilesLines
* cxl/pci: Find and register CXL PMU devicesJonathan Cameron2023-05-301-0/+1
* cxl: Wait Memory_Info_Valid before access memory related infoDave Jiang2023-05-191-0/+2
* cxl/pci: Handle truncated CDAT entriesLukas Wunner2023-04-041-0/+14
* Merge branch 'for-6.3/cxl-rr-emu' into cxl/nextDan Williams2023-02-151-1/+2
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| * cxl/port: Export cxl_dvsec_rr_decode() to cxl_portDave Jiang2023-02-151-1/+2
* | cxl/mem: Wire up event interruptsDavidlohr Bueso2023-01-271-0/+6
* | cxl/pci: Move tracepoint definitions to drivers/cxl/core/Dan Williams2023-01-051-0/+3
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* cxl/core/regs: Make cxl_map_{component, device}_regs() device genericDan Williams2022-12-031-9/+0
* cxl/port: Read CDAT tableIra Weiny2022-07-201-0/+1
* cxl/port: Reuse 'struct cxl_hdm' context for hdm initDan Williams2022-05-191-1/+1
* cxl/pci: Drop @info argument to cxl_hdm_decode_init()Dan Williams2022-05-191-3/+1
* cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()Dan Williams2022-05-191-2/+2
* cxl/mem: Consolidate CXL DVSEC Range enumeration in the coreDan Williams2022-05-191-0/+4
* cxl/pci: Retrieve CXL DVSEC memory infoBen Widawsky2022-02-091-0/+13
* cxl/core/port: Remove @host argument for dport + decoder enumerationDan Williams2022-02-091-1/+1
* cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky2022-02-091-0/+1
* cxl/core: Generalize dport enumeration in the coreDan Williams2022-02-091-0/+1
* cxl/pci: Rename pci.h to cxlpci.hDan Williams2022-02-091-0/+60