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path: root/drivers/gpu/drm/i915/display/intel_dp.h (follow)
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* drm/i915/dp: Perform 30ms delay after source OUI writeLyude Paul2021-12-011-0/+2
* drm/i915: Enable TPS3/4 on all platforms that support themVille Syrjälä2021-09-301-2/+2
* drm/i915/display: Only keep PSR enabled if there is active planesJosé Roberto de Souza2021-09-231-1/+1
* drm/i915/dp: add helper for checking for UHBR link rateJani Nikula2021-09-201-0/+1
* drm/i915/display: Move DRRS code its own fileJosé Roberto de Souza2021-08-301-11/+0
* drm/i915/dp: add max data rate calculation for UHBR ratesJani Nikula2021-08-241-1/+1
* drm/i915/dp: use actual link rate values in struct link_config_limitsJani Nikula2021-08-241-1/+1
* drm/i915/hdcp: add intel_dp_hdcp.h and rename init accordinglyJani Nikula2021-04-281-3/+0
* drm/i915: Introduce g4x_dp.cVille Syrjälä2021-03-191-6/+0
* drm/i915: Split intel_ddi_encoder_reset() from intel_dp_encoder_reset()Ville Syrjälä2021-03-191-1/+0
* drm/i915: Relocate intel_dp_program_link_training_pattern()Ville Syrjälä2021-03-191-4/+0
* drm/i915/dp: split out aux functionality to intel_dp_aux.cJani Nikula2021-01-211-1/+0
* drm/i915: Fix the PHY compliance test vs. hotplug mishapVille Syrjälä2021-01-191-0/+1
* drm/i915/pps: abstract panel power sequencer from intel_dp.cJani Nikula2021-01-141-4/+1
* drm/i915/dp: Move intel_dp_set_signal_levels() to intel_dp_link_training.cImre Deak2021-01-131-3/+0
* drm/i915/display: Let PCON convert from RGB to YCbCr if it canAnkit Nautiyal2020-12-221-1/+2
* drm/i915/display: Configure PCON for DSC1.1 to DSC1.2 encodingAnkit Nautiyal2020-12-221-0/+2
* drm/i915: Add support for starting FRL training for HDMI2.1 via PCONAnkit Nautiyal2020-12-221-0/+2
* drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.Maarten Lankhorst2020-11-181-0/+1
* drm/i915: s/intel_dp_sink_dpms/intel_dp_set_power/Ville Syrjälä2020-10-201-1/+1
* drm/i915: Switch to LTTPR non-transparent mode link trainingImre Deak2020-10-121-2/+0
* drm/i915: Simplify the link training functionsImre Deak2020-10-121-2/+0
* drm/i915: Wait for eDP panel power cycle delay on reboot on all platformsVille Syrjälä2020-10-091-0/+1
* drm/i915: Add an encoder hook to sanitize its state during init/resumeImre Deak2020-10-061-0/+2
* drm/i915: Move the initial fastset commit check to encoder hooksImre Deak2020-10-061-0/+3
* drm/i915: Plumb crtc_state to link trainingVille Syrjälä2020-10-011-4/+6
* drm/i915: Make intel_dp_process_phy_request() staticVille Syrjälä2020-10-011-1/+0
* drm/i915: Decouple intel_dp_{min,output}_bpp() from crtc_stateVille Syrjälä2020-09-241-1/+2
* drm/i915: Configure DP 1.3+ protocol converted HDMI modeVille Syrjälä2020-09-171-0/+1
* Merge drm/drm-next into drm-intel-next-queuedRodrigo Vivi2020-09-121-1/+0
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| * drm/i915/dp: Extract drm_dp_read_dpcd_caps()Lyude Paul2020-09-011-1/+0
* | drm/i915: Factor out HDCP shim functions from dp for use by dp_mstSean Paul2020-09-011-0/+3
* | drm/i915: Use ddi_update_pipe in intel_dp_mstSean Paul2020-09-011-0/+6
* | drm/i915/display: Disable DRRS when needed in fastsetsJosé Roberto de Souza2020-08-271-0/+2
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* drm/i915/display: prefer dig_port to reference intel_digital_portLucas De Marchi2020-07-021-2/+2
* drm/i915: Add {preemph,voltage}_max() vfuncsVille Syrjälä2020-06-031-4/+0
* drm/i915/dp: Add compute routine for DP PSR VSC SDPGwan-gyeong Mun2020-05-141-0/+8
* drm/i915: Program DP SDPs with computed configsGwan-gyeong Mun2020-05-141-6/+0
* drm/i915/dp: Read out DP SDPsGwan-gyeong Mun2020-05-141-0/+3
* Merge tag 'topic/phy-compliance-2020-04-08' of git://anongit.freedesktop.org/...Joonas Lahtinen2020-04-161-0/+1
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| * drm/i915/dp: Program vswing, pre-emphasis, test-patternAnimesh Manna2020-04-081-0/+1
* | drm/i915/dp: Add writing of DP SDPsGwan-gyeong Mun2020-03-201-0/+3
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* drm/i915: significantly reduce the use of <drm/i915_drm.h>Jani Nikula2020-02-271-2/+0
* drm/i915/dp: Program an Infoframe SDP Header and DB for HDR Static MetadataGwan-gyeong Mun2019-10-151-0/+3
* drm/i915/dp: Add support of BT.2020 Colorimetry to DP MSAGwan-gyeong Mun2019-10-151-0/+2
* drm/i915/dp: Extend program of VSC Header and DB for Colorimetry FormatGwan-gyeong Mun2019-10-151-0/+3
* drm/i915/dp: Fix dsc bpp calculations, v5.Maarten Lankhorst2019-09-251-4/+2
* drm: Move port definition back to i915 headerRamalingam C2019-08-301-0/+1
* drm/i915: Move the TypeC port handling code to a separate fileImre Deak2019-07-011-2/+0
* drm/i915: move modesetting output/encoder code under display/Jani Nikula2019-06-171-0/+123
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