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path: root/drivers/gpu/drm/i915/i915_suspend.c (follow)
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* drm/i915: Only save/restore FBC on the platform that supports FBCZhao Yakui2010-04-121-19/+22
| | | | | Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
* drm/i915: Deobfuscate the render p-state obfuscationMatthew Garrett2010-02-221-2/+4
| | | | | | | | The ironlake render p-state support includes some rather odd variable names. Clean them up in order to improve the readability of the code. Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: add dynamic performance control support for IronlakeJesse Barnes2010-02-221-0/+8
| | | | | | | | | | | | | | | | | Ironlake (and 965GM, which this patch doesn't support) supports a hardware performance and power management feature that allows it to adjust to changes in GPU load over time with software help. The goal if this is to maximize performance/power for a given workload. This patch enables that feature, which is also a requirement for supporting Intelligent Power Sharing, a feature which allows for dynamic budgeting of power between the CPU and GPU in Arrandale platforms. Tested-by: ykzhao <yakui.zhao@intel.com> [anholt: Resolved against the irq handler loop removal] Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Fix RC6 suspend/resumeAndrew Lutomirski2010-01-061-12/+0
| | | | | | | | | We restored RC6 twice on resume, even with modesetting off. Instead, only restore it once and skip RC6 initialization entirely in non-KMS mode. Signed-off-by: Andy Lutomirski <luto@mit.edu> Tested-by: Jeff Chua <jeff.chua.linux@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* Merge remote branch 'anholt/drm-intel-next' into drm-linusDave Airlie2009-12-101-6/+1
|\ | | | | | | Pull more Intel changes in, especially one to init the GTT properly
| * drm/i915: restore render clock gating on resumeAndrew Lutomirski2009-12-081-6/+1
| | | | | | | | | | | | | | | | | | Rather than restoring just a few clock gating registers on resume, just reinitialize the whole thing. Signed-off-by: Andy Lutomirski <luto@mit.edu> [anholt: Fixed up for RC6 support landed since the patch was written] Signed-off-by: Eric Anholt <eric@anholt.net>
* | Merge remote branch 'anholt/drm-intel-next' into drm-linusDave Airlie2009-12-081-36/+43
|\| | | | | | | | | | | | | | | | | | | | | This merges the upstream Intel tree and fixes up numerous conflicts due to patches merged into Linus tree later in -rc cycle. Conflicts: drivers/char/agp/intel-agp.c drivers/gpu/drm/drm_dp_i2c_helper.c drivers/gpu/drm/i915/i915_irq.c drivers/gpu/drm/i915/i915_suspend.c
| * drm/i915: Fix product names and #definesAdam Jackson2009-12-071-30/+30
| | | | | | | | | | | | | | | | | | IGD* isn't a useful name. Replace with the codenames, as sourced from pci.ids. Signed-off-by: Adam Jackson <ajax@redhat.com> [anholt: Fixed up for merge with pineview/ironlake changes] Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: Fix DDC on some systems by clearing BIOS GMBUS setup.Eric Anholt2009-12-011-1/+4
| | | | | | | | | | | | | | | | This is a sync of a fix I made in the old UMS code. If the BIOS uses the GMBUS and doesn't clear that setup, then our bit-banging I2C can fail, leading to monitors not being detected. Signed-off-by: Eric Anholt <eric@anholt.net>
| * drm/i915: add render standby supportJesse Barnes2009-11-051-2/+6
| | | | | | | | | | | | | | | | | | | | Render standy allows the GPU to power down the render unit when idle. In order for this to work, it needs a page of graphics memory to save state. This patch allocates that page and enables the feature on supported chipsets. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* | drm/i915: Add more registers save/restore for Ironlake suspendZhenyu Wang2009-11-121-1/+35
|/ | | | | | | | | Add more display registers save/restore to fix unstable issues during S4 testing on Ironlake. And DPLL_B_MD should not be restored on Ironlake. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Ironlake suspend/resume supportZhenyu Wang2009-10-231-55/+226
| | | | | | | | | | This adds registers save/restore for Ironlake to make suspend work. Signed-off-by: Guo, Chaohong <chaohong.guo@intel.com> [zhenyuw: some code re-orgnization, and add more save/restore for FDI link and transcoder registers, also fix palette register for Ironlake] Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: save/restore BLC histogram control reg across suspend/resumeJesse Barnes2009-10-151-0/+2
| | | | | | | | Turns out some machines, like the ThinkPad X40 don't come back if you don't save/restore this register. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Save and restore the GM45 FBC regs on suspend and resume.Jesse Barnes2009-10-131-8/+18
| | | | | | | | This hasn't fixed the regressions we were testing against, but clearly should be required. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Refactor save/restore codeBen Gamari2009-09-171-73/+97
| | | | | | | | | We move the display-specific code into it's own functions, called from the general GPU state save/restore functions. This will be needed later by the GPU reset code. Signed-off-by: Ben Gamari <bgamari.foss@gmail.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: add dynamic clock frequency controlJesse Barnes2009-09-041-2/+2
| | | | | | | | | | | | | | | | | There are several sources of unnecessary power consumption on Intel graphics systems. The first is the LVDS clock. TFTs don't suffer from persistence issues like CRTs, and so we can reduce the LVDS refresh rate when the screen is idle. It will be automatically upclocked when userspace triggers graphical activity. Beyond that, we can enable memory self refresh. This allows the memory to go into a lower power state when the graphics are idle. Finally, we can drop some clocks on the gpu itself. All of these things can be reenabled between frames when GPU activity is triggered, and so there should be no user visible graphical changes. Signed-off-by: Jesse Barnes <jesse.barnes@intel.com> Signed-off-by: Matthew Garrett <mjg@redhat.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Fix read outside array bounds in restoring the SWF10 range.Roel Kluin2009-08-051-1/+1
| | | | | | | | dev_priv->saveSWF1 is a 16 element array, but this reads up to index 22, and restored values from the wrong registers. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Avoid saving/restore the modesetting registers twice in KMS modeZhao Yakui2009-07-101-100/+121
| | | | | | | | | | In KMS mode we now use the normal mode-setting paths to set the modes back to the current configuration, so we don't need to also run the more limited non-KMS implementation of modesetting for resume. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Add Display Port supportKeith Packard2009-06-191-1/+33
| | | | Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: Save/restore cursor state on suspend/resume.Eric Anholt2009-06-041-0/+20
| | | | | | | | | | This may fix cursor corruption in X on resume, which would persist until the cursor was hidden and then shown again. V2: Also include the cursor control regs. Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: save/restore fence registers across suspend/resumeKeith Packard2009-05-011-0/+24
| | | | | | | | | | This makes software fallbacks not do tiling wrong on i965 and later after resume. It also should fix 945 performance reduction after resume which would have disabled tiling without causing any visible effect. Signed-off-by: Keith Packard <keithp@keithp.com> [anholt: Fixed up the 915 case to not save/restore the new regs] Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Don't restore palettes through VGA registers.Pierre Willenbrock2009-03-101-11/+0
| | | | | | | | The VGA registers just hit the pipe registers that we already set through MMIO. This fixes strange colors on resume. Signed-off-by: Pierre Willenbrock <pierre@pirsoft.de> Signed-off-by: Eric Anholt <eric@anholt.net>
* drm/i915: Save/restore HWS_PGA on suspend/resumePeng Li2008-11-261-0/+6
| | | | | | | | | | | It fixes suspend/resume failure of xf86-video-intel dri2 branch. As dri2 branch doesn't call I830DRIResume() to restore hardware status page anymore, we need to preserve this register across suspend/resume. Signed-off-by: Peng Li <peng.li@intel.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@redhat.com>
* i915: Save/restore MCHBAR_RENDER_STANDBY on GM965/GM45Keith Packard2008-11-111-0/+9
| | | | | | | | | This register is set by the 2D driver to prevent lockups, and so it needs to be preserved across suspend/resume too. This makes my X200s work. Signed-off-by: Keith Packard <keithp@keithp.com> Signed-off-by: Eric Anholt <eric@anholt.net> Signed-off-by: Dave Airlie <airlied@linux.ie>
* new chip name is GM45Jesse Barnes2008-10-171-1/+1
| | | | | | | | | | Author: Zhenyu Wang <zhenyu.z.wang@intel.com> i915: official name for GM45 chipset Signed-off-by: Zhenyu Wang <zhenyu.z.wang@intel.com> Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
* separate i915 suspend/resume functions into their own fileJesse Barnes2008-10-171-0/+509
[Patch against drm-next. Consider this a trial balloon for our new Linux development model.] This is a big chunk of code. Separating it out makes it easier to change without churn on the main i915_drv.c file (and there will be churn as we fix bugs and add things like kernel mode setting). Also makes it easier to share this file with BSD. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Dave Airlie <airlied@redhat.com>
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