| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | drm/msm/dsi: fuse dsi_pll_* code into dsi_phy_* code | Dmitry Baryshkov | 2021-04-07 | 1 | -132/+0 |
| * | drm/msm/dsi: fix check-before-set in the 7nm dsi_pll code | Dmitry Baryshkov | 2021-03-17 | 1 | -2/+4 |
| * | drm/msm/dsi: add support for 7nm DSI PHY/PLL | Jonathan Marek | 2020-09-12 | 1 | -0/+10 |
| * | drm/msm: drop use of drmP.h | Sam Ravnborg | 2019-09-04 | 1 | -1/+1 |
| * | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284 | Thomas Gleixner | 2019-06-05 | 1 | -9/+1 |
| * | drm/msm/dsi: Add skeleton 10nm PHY/PLL code | Archit Taneja | 2018-02-20 | 1 | -0/+9 |
| * | drm/msm/dsi: Add PHY/PLL for 8x96 | Archit Taneja | 2017-02-06 | 1 | -0/+11 |
| * | drm/msm/dsi: fix definition of msm_dsi_pll_28nm_8960_init() | Luis Henriques | 2016-03-03 | 1 | -2/+2 |
| * | drm/msm/dsi: Add DSI PLL for 28nm 8960 PHY | Archit Taneja | 2015-12-14 | 1 | -0/+10 |
| * | drm/msm/dsi: Make each PHY type compilation independent | Hai Li | 2015-08-16 | 1 | -0/+8 |
| * | drm/msm/dsi: Save/Restore PLL status across PHY reset | Hai Li | 2015-08-16 | 1 | -0/+1 |
| * | drm/msm/dsi: Add DSI PLL clock driver support | Hai Li | 2015-06-11 | 1 | -0/+89 |
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