| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | irqchip/riscv-aplic: Retrigger MSI interrupt on source configuration | Yong-Xuan Wang | 2024-08-10 | 1 | -7/+25 |
| * | irqchip/riscv-aplic: Fix spelling mistake "forwared" -> "forwarded" | Colin Ian King | 2024-04-09 | 1 | -1/+1 |
| * | irqchip/riscv-aplic: Add support for MSI-mode | Anup Patel | 2024-03-25 | 1 | -0/+257 |
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