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path: root/drivers/mtd/spi-nor/core.h (follow)
Commit message (Expand)AuthorAgeFilesLines
* mtd: core: Constify buf in mtd_write_user_prot_reg()Tudor Ambarus2021-04-161-2/+4
* mtd: spi-nor: implement OTP support for Winbond and similar flashesMichael Walle2021-04-021-0/+6
* mtd: spi-nor: add OTP supportMichael Walle2021-04-021-0/+53
* mtd: spi-nor: Move Software Write Protection logic out of the coreTudor Ambarus2021-03-311-0/+4
* mtd: spi-nor: Get rid of duplicated argument in spi_nor_parse_sfdp()Tudor Ambarus2021-03-151-4/+2
* mtd: spi-nor: sst: Add support for Global Unlock on sst26vfTudor Ambarus2021-02-051-0/+1
* mtd: spi-nor: Add Global Block Unlock commandTudor Ambarus2021-02-051-0/+1
* mtd: spi-nor: keep lock bits if they are non-volatileMichael Walle2020-12-071-0/+8
* mtd: spi-nor: atmel: fix unlock_all() for AT25FS010/040Michael Walle2020-12-071-0/+1
* mtd: spi-nor: core: Allow flashes to specify MTD writesizePratyush Yadav2020-12-071-0/+3
* mtd: spi-nor: sfdp: detect Soft Reset sequence support from BFPTPratyush Yadav2020-11-091-0/+1
* mtd: spi-nor: core: enable octal DTR mode when possiblePratyush Yadav2020-11-091-0/+2
* mtd: spi-nor: Introduce SNOR_F_IO_MODE_EN_VOLATILETudor Ambarus2020-11-091-0/+6
* mtd: spi-nor: sfdp: parse xSPI Profile 1.0 tablePratyush Yadav2020-11-091-0/+10
* mtd: spi-nor: add support for DTR protocolPratyush Yadav2020-11-091-0/+7
* Revert "mtd: spi-nor: Add capability to disable flash quad mode"Yicong Yang2020-09-141-5/+5
* mtd: spi-nor: Add capability to disable flash quad modeYicong Yang2020-07-131-5/+5
* mtd: spi-nor: Add SR 4bit block protection supportJungseung Lee2020-03-241-0/+10
* mtd: spi-nor: Trim what is exposed in spi-nor.hTudor Ambarus2020-03-171-0/+214
* mtd: spi-nor: Move XMC bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move Xilinx bits out of core.cBoris Brezillon2020-03-171-11/+2
* mtd: spi-nor: Move Catalyst bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move Winbond bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move SST bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move Spansion bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move Micron/ST bits out of core.cBoris Brezillon2020-03-171-0/+2
* mtd: spi-nor: Move Macronix bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move ISSI bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move Intel bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move GigaDevice bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move Fujitsu bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move Everspin bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move ESMT bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move Eon bits out of core.cBoris Brezillon2020-03-171-0/+1
* mtd: spi-nor: Move Atmel bits out of core.cBoris Brezillon2020-03-171-0/+3
* mtd: spi-nor: Add the concept of SPI NOR manufacturer driverBoris Brezillon2020-03-171-0/+14
* mtd: spi-nor: Expose stuctures and functions to manufacturer driversBoris Brezillon2020-03-171-0/+158
* mtd: spi-nor: Move SFDP logic out of the coreTudor Ambarus2020-03-161-0/+36
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