| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | pinctrl: Rename sh-pfc to renesas | Geert Uytterhoeven | 2020-09-15 | 1 | -5323/+0 |
| * | Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D" | Geert Uytterhoeven | 2019-10-01 | 1 | -4/+5 |
| * | Revert "pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and... | Geert Uytterhoeven | 2019-10-01 | 1 | -9/+11 |
| * | pinctrl: sh-pfc: r8a77990: Rename AVB_AVTP_{MATCH,CAPTURE} pin functions | Takeshi Kihara | 2019-10-01 | 1 | -16/+16 |
| * | pinctrl: sh-pfc: r8a77990: Use new macros for non-GPIO pins | Geert Uytterhoeven | 2019-06-04 | 1 | -46/+41 |
| * | pinctrl: sh-pfc: Move PIN_NONE to shared header file | Geert Uytterhoeven | 2019-05-21 | 1 | -45/+44 |
| * | pinctrl: sh-pfc: Add SH_PFC_PIN_CFG_PULL_UP_DOWN shorthand | Geert Uytterhoeven | 2019-05-21 | 1 | -2/+1 |
| * | pinctrl: sh-pfc: Rename 2-parameter CPU_ALL_PORT() variant | Geert Uytterhoeven | 2019-05-21 | 1 | -1/+1 |
| * | pinctrl: sh-pfc: rcar-gen3: Rename SEL_NDFC to SEL_NDF | Takeshi Kihara | 2019-04-02 | 1 | -13/+13 |
| * | pinctrl: sh-pfc: rcar-gen3: Rename RTS{0,1,3,4}# pin function definitions | Takeshi Kihara | 2019-04-02 | 1 | -18/+18 |
| * | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2 | Takeshi Kihara | 2019-04-02 | 1 | -11/+9 |
| * | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D | Takeshi Kihara | 2019-04-02 | 1 | -5/+4 |
| * | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit16 when using NFALE and NFRB_N | Takeshi Kihara | 2019-04-02 | 1 | -2/+2 |
| * | pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro | Geert Uytterhoeven | 2019-04-02 | 1 | -6/+8 |
| * | pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro | Geert Uytterhoeven | 2019-04-02 | 1 | -46/+46 |
| * | pinctrl: sh-pfc: Add missing #include <linux/errno.h> | Geert Uytterhoeven | 2019-04-02 | 1 | -0/+1 |
| * | pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume | Marek Vasut | 2019-03-18 | 1 | -0/+2 |
| * | pinctrl: sh-pfc: r8a77990: Move CANFD pin groups and functions | Fabrizio Castro | 2019-03-18 | 1 | -8/+8 |
| * | pinctrl: sh-pfc: r8a77990: Rename IOCTRLx registers | Geert Uytterhoeven | 2019-03-18 | 1 | -3/+3 |
| * | pinctrl: sh-pfc: r8a77990: Add DRIF pins, groups and functions | Takeshi Kihara | 2019-02-05 | 1 | -2/+253 |
| * | pinctrl: sh-pfc: r8a77990: Add TMU pins, groups and functions | Takeshi Kihara | 2019-01-21 | 1 | -2/+51 |
| * | Revert "pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins" | Geert Uytterhoeven | 2019-01-21 | 1 | -18/+5 |
| * | pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capability | Geert Uytterhoeven | 2019-01-21 | 1 | -1/+10 |
| * | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL bit numbering | Takeshi Kihara | 2019-01-21 | 1 | -14/+18 |
| * | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2 | Takeshi Kihara | 2019-01-21 | 1 | -5/+5 |
| * | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0 | Takeshi Kihara | 2019-01-21 | 1 | -2/+2 |
| * | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 SEL_I2C1 field width | Geert Uytterhoeven | 2018-12-18 | 1 | -1/+1 |
| * | pinctrl: sh-pfc: r8a77990: Fix IOCTRL reg state after s2ram on R-Car E3 | Geert Uytterhoeven | 2018-12-18 | 1 | -0/+1 |
| * | pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins | Geert Uytterhoeven | 2018-12-18 | 1 | -5/+18 |
| * | pinctrl: sh-pfc: r8a77990: Add CAN FD pins, groups and functions | Takeshi Kihara | 2018-11-19 | 1 | -2/+37 |
| * | pinctrl: sh-pfc: r8a77990: Add CAN pins, groups and functions | Takeshi Kihara | 2018-11-19 | 1 | -2/+49 |
| * | pinctrl: sh-pfc: r8a77990: Add HSCIF pins, groups, and functions | Takeshi Kihara | 2018-11-19 | 1 | -2/+368 |
| * | pinctrl: sh-pfc: r8a77990: Add VIN[4|5] groups/functions | Jacopo Mondi | 2018-11-13 | 1 | -2/+298 |
| * | pinctrl: sh-pfc: r8a77990: Add voltage switch operations for SDHI | Takeshi Kihara | 2018-11-13 | 1 | -2/+33 |
| * | pinctrl: sh-pfc: r8a77990: Add SDHI pins, groups and functions | Takeshi Kihara | 2018-11-13 | 1 | -2/+216 |
| * | pinctrl: sh-pfc: r8a77990: Add Audio SSI pins, groups and functions | Takeshi Kihara | 2018-11-06 | 1 | -2/+238 |
| * | pinctrl: sh-pfc: r8a77990: Add Audio clock pins, groups and functions | Takeshi Kihara | 2018-11-06 | 1 | -2/+205 |
| * | pinctrl: sh-pfc: r8a77990: Add INTC-EX pins, groups and function | Geert Uytterhoeven | 2018-10-02 | 1 | -2/+62 |
| * | pinctrl: sh-pfc: rcar: Rename automotive-only arrays to automotive | Geert Uytterhoeven | 2018-09-28 | 1 | -4/+4 |
| * | pinctrl: sh-pfc: r8a77990: Add R8A774C0 PFC support | Fabrizio Castro | 2018-09-19 | 1 | -151/+188 |
| * | pinctrl: sh-pfc: r8a77990: Add MSIOF pins, groups and functions | Takeshi Kihara | 2018-09-11 | 1 | -0/+405 |
| * | pinctrl: sh-pfc: r8a77990: Add DU pins, groups and function | Laurent Pinchart | 2018-08-30 | 1 | -0/+110 |
| * | pinctrl: sh-pfc: r8a77990: Add PWM pins, groups and functions | Takeshi Kihara | 2018-08-28 | 1 | -0/+211 |
| * | pinctrl: sh-pfc: r8a77990: Add USB3.0 pins, groups and functions | Takeshi Kihara | 2018-07-16 | 1 | -0/+27 |
| * | pinctrl: sh-pfc: r8a77990: Add USB2.0 pins, groups and functions | Takeshi Kihara | 2018-07-16 | 1 | -0/+38 |
| * | pinctrl: sh-pfc: r8a77990: Revise USB ID pin name | Yoshihiro Shimoda | 2018-07-16 | 1 | -2/+2 |
| * | pinctrl: sh-pfc: r8a77990: Add EthernetAVB pins, groups and functions | Takeshi Kihara | 2018-05-23 | 1 | -0/+90 |
| * | pinctrl: sh-pfc: r8a77990: Add I2C{1,2,4,5,6,7} pins, groups and functions | Takeshi Kihara | 2018-05-23 | 1 | -0/+190 |
| * | pinctrl: sh-pfc: r8a77990: Add SCIF pins, groups and functions | Takeshi Kihara | 2018-05-23 | 1 | -0/+365 |
| * | pinctrl: sh-pfc: r8a77990: Add bias pinconf support | Takeshi Kihara | 2018-05-23 | 1 | -9/+331 |
