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path: root/drivers/pinctrl/sh-pfc (follow)
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* pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functionsTakeshi Kihara2019-02-111-0/+350
* pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functionsTakeshi Kihara2019-02-111-0/+48
* pinctrl: sh-pfc: Validate fixed-size field widths at build timeGeert Uytterhoeven2019-02-111-1/+2
* pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groupsGeert Uytterhoeven2019-02-111-1/+2
* pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin groupGeert Uytterhoeven2019-02-111-0/+1
* pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin groupGeert Uytterhoeven2019-02-111-1/+1
* pinctrl: sh-pfc: emev2: Add missing pinmux functionsGeert Uytterhoeven2019-02-111-0/+20
* pinctrl: sh-pfc: r8a77990: Add DRIF pins, groups and functionsTakeshi Kihara2019-02-051-2/+253
* pinctrl: sh-pfc: r8a7778: Fix HSPI pin numbers and namesGeert Uytterhoeven2019-01-211-3/+3
* pinctrl: sh-pfc: r8a77990: Add TMU pins, groups and functionsTakeshi Kihara2019-01-211-2/+51
* pinctrl: sh-pfc: r8a77965: Replace DU_DOTCLKIN2 by DU_DOTCLKIN3Geert Uytterhoeven2019-01-211-3/+3
* pinctrl: sh-pfc: r8a7791: Fix VIN1 versioned groupsGeert Uytterhoeven2019-01-211-34/+34
* pinctrl: sh-pfc: r8a77980: Deduplicate VIN1 pin definitionsGeert Uytterhoeven2019-01-211-43/+21
* pinctrl: sh-pfc: r8a77970: Deduplicate VIN[01] pin definitionsGeert Uytterhoeven2019-01-211-86/+42
* pinctrl: sh-pfc: r8a7796: Deduplicate VIN5 pin definitionsGeert Uytterhoeven2019-01-211-64/+26
* pinctrl: sh-pfc: r8a7795: Deduplicate VIN5 pin definitionsGeert Uytterhoeven2019-01-211-64/+26
* pinctrl: sh-pfc: r8a7794: Initialize TDSEL register for ES1.0Wolfram Sang2019-01-211-0/+16
* pinctrl: sh-pfc: r8a7790: Initialize TDSEL register for ES1.0Wolfram Sang2019-01-211-0/+17
* pinctrl: sh-pfc: Print pin group when debuggingGeert Uytterhoeven2019-01-211-0/+2
* Revert "pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins"Geert Uytterhoeven2019-01-211-18/+5
* pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capabilityGeert Uytterhoeven2019-01-211-1/+10
* pinctrl: sh-pfc: r8a77995: Fix MOD_SEL bit numberingTakeshi Kihara2019-01-211-4/+7
* pinctrl: sh-pfc: r8a77990: Fix MOD_SEL bit numberingTakeshi Kihara2019-01-211-14/+18
* pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2Takeshi Kihara2019-01-211-5/+5
* pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0Takeshi Kihara2019-01-211-2/+2
* pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-lengthGeert Uytterhoeven2018-12-181-2/+1
* pinctrl: sh-pfc: Print actual field width for variable-width fieldsGeert Uytterhoeven2018-12-181-1/+1
* pinctrl: sh-pfc: sh7734: Fix shifted values in IPSR10Geert Uytterhoeven2018-12-181-8/+8
* pinctrl: sh-pfc: sh7734: Remove bogus IPSR10 valueGeert Uytterhoeven2018-12-181-1/+1
* pinctrl: sh-pfc: sh7269: Add missing PCIOR0 fieldGeert Uytterhoeven2018-12-181-1/+1
* pinctrl: sh-pfc: sh7264: Fix PFCR3 and PFCR0 register configurationGeert Uytterhoeven2018-12-181-2/+7
* pinctrl: sh-pfc: r8a77995: Remove bogus SEL_PWM[0-3]_3 configurationsGeert Uytterhoeven2018-12-181-4/+4
* pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 SEL_I2C1 field widthGeert Uytterhoeven2018-12-181-1/+1
* pinctrl: sh-pfc: sh7734: Add missing IPSR11 fieldGeert Uytterhoeven2018-12-181-1/+1
* pinctrl: sh-pfc: r8a77980: Add missing MOD_SEL0 fieldGeert Uytterhoeven2018-12-181-1/+1
* pinctrl: sh-pfc: r8a77970: Add missing MOD_SEL0 fieldGeert Uytterhoeven2018-12-181-1/+1
* pinctrl: sh-pfc: r8a7794: Remove bogus IPSR9 fieldGeert Uytterhoeven2018-12-181-1/+1
* pinctrl: sh-pfc: Validate pins/marks in pin groups at build timeGeert Uytterhoeven2018-12-181-1/+2
* pinctrl: sh-pfc: sh73a0: Add missing TO pin to tpu4_to3 groupGeert Uytterhoeven2018-12-181-0/+1
* pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 groupGeert Uytterhoeven2018-12-181-3/+0
* pinctrl: sh-pfc: r8a7791: Remove bogus ctrl marks from qspi_data4_b groupGeert Uytterhoeven2018-12-181-2/+1
* pinctrl: sh-pfc: r8a7740: Add missing LCD0 marks to lcd0_data24_1 groupGeert Uytterhoeven2018-12-181-0/+1
* pinctrl: sh-pfc: r8a7740: Add missing REF125CK pin to gether_gmii groupGeert Uytterhoeven2018-12-181-1/+1
* pinctrl: sh-pfc: r8a77990: Fix IOCTRL reg state after s2ram on R-Car E3Geert Uytterhoeven2018-12-181-0/+1
* pinctrl: sh-pfc: r8a77990: Add support for pull-up only pinsGeert Uytterhoeven2018-12-181-5/+18
* pinctrl: sh-pfc: r8a77980: Add QSPI pins, groups, and functionsDmitry Shifrin2018-11-201-0/+70
* pinctrl: sh-pfc: r8a77990: Add CAN FD pins, groups and functionsTakeshi Kihara2018-11-191-2/+37
* pinctrl: sh-pfc: r8a77990: Add CAN pins, groups and functionsTakeshi Kihara2018-11-191-2/+49
* pinctrl: sh-pfc: r8a77965: Add CAN FD pins, groups and functionsTakeshi Kihara2018-11-191-0/+42
* pinctrl: sh-pfc: r8a77965: Add CAN pins, groups and functionsTakeshi Kihara2018-11-191-0/+58