summaryrefslogtreecommitdiffstats
path: root/tools/arch/x86/lib/x86-opcode-map.txt (follow)
Commit message (Expand)AuthorAgeFilesLines
* x86/insn: Add support for APX EVEX instructions to the opcode mapAdrian Hunter2024-05-021-0/+93
* x86/insn: x86/insn: Add support for REX2 prefix to the instruction decoder op...Adrian Hunter2024-05-021-72/+76
* x86/insn: Add misc new Intel instructionsAdrian Hunter2024-05-021-12/+45
* x86/insn: Add VEX versions of VPDPBUSD, VPDPBUSDS, VPDPWSSD and VPDPWSSDSAdrian Hunter2024-05-021-4/+4
* x86/insn: Fix PUSH instruction in x86 instruction decoder opcode mapAdrian Hunter2024-05-021-1/+1
* x86/insn: Add Key Locker instructions to the opcode mapChang S. Bae2024-05-021-4/+7
* x86/opcode: Add ERET[US] instructions to the x86 opcode mapH. Peter Anvin (Intel)2024-01-311-1/+1
* x86/cpufeatures,opcode,msr: Add the WRMSRNS instruction supportXin Li2024-01-251-1/+1
* x86/opcode: Add the LKGS instruction to x86-opcode-mapH. Peter Anvin (Intel)2023-01-121-0/+1
* x86/insn: Add AVX512-FP16 instructions to the x86 instruction decoderAdrian Hunter2022-01-231-8/+87
* x86/insn: Add misc instructions to x86 instruction decoderAdrian Hunter2022-01-231-3/+3
* x86/insn: Add AMX instructions to the x86 instruction decoderAdrian Hunter2022-01-231-2/+8
* x86/insn: Add Control-flow Enforcement (CET) instructions to the opcode mapYu-cheng Yu2020-03-261-6/+11
* x86/decoder: Add TEST opcode to Group3-2Masami Hiramatsu2020-01-221-1/+1
* x86/insn: Add some more Intel instructions to the opcode mapAdrian Hunter2019-11-261-12/+32
* x86/insn: Add some Intel instructions to the opcode mapAdrian Hunter2019-11-181-6/+12
* objtool: Move x86 insn decoder to a common locationJosh Poimboeuf2019-09-011-0/+1072
generated by cgit v1.2.3 (git 2.39.1) at 2025-01-11 14:28:01 +0100