summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/arm/marvell,berlin.txt
blob: 744a7ea569d4cf963b2f00d6ea3800d95af1d725 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
Marvell Berlin SoC Family Device Tree Bindings
---------------------------------------------------------------

Boards with a SoC of the Marvell Berlin family, e.g. Armada 1500
shall have the following properties:

* Required root node properties:
compatible: must contain "marvell,berlin"

In addition, the above compatible shall be extended with the specific
SoC and board used. Currently known SoC compatibles are:
    "marvell,berlin2"      for Marvell Armada 1500 (BG2, 88DE3100),
    "marvell,berlin2cd"    for Marvell Armada 1500-mini (BG2CD, 88DE3005)
    "marvell,berlin2ct"    for Marvell Armada ? (BG2CT, 88DE????)
    "marvell,berlin2q"     for Marvell Armada 1500-pro (BG2Q, 88DE3114)
    "marvell,berlin3"      for Marvell Armada ? (BG3, 88DE????)

* Example:

/ {
	model = "Sony NSZ-GS7";
	compatible = "sony,nsz-gs7", "marvell,berlin2", "marvell,berlin";

	...
}

* Marvell Berlin2 chip control binding

Marvell Berlin SoCs have a chip control register set providing several
individual registers dealing with pinmux, padmux, clock, reset, and secondary
CPU boot address. Unfortunately, the individual registers are spread among the
chip control registers, so there should be a single DT node only providing the
different functions which are described below.

Required properties:
- compatible: shall be one of
	"marvell,berlin2-chip-ctrl" for BG2
	"marvell,berlin2cd-chip-ctrl" for BG2CD
	"marvell,berlin2q-chip-ctrl" for BG2Q
- reg: address and length of following register sets for
  BG2/BG2CD: chip control register set
  BG2Q: chip control register set and cpu pll registers

* Clock provider binding

As clock related registers are spread among the chip control registers, the
chip control node also provides the clocks. Marvell Berlin2 (BG2, BG2CD, BG2Q)
SoCs share the same IP for PLLs and clocks, with some minor differences in
features and register layout.

Required properties:
- #clock-cells: shall be set to 1
- clocks: clock specifiers referencing the core clock input clocks
- clock-names: array of strings describing the input clock specifiers above.
    Allowed clock-names for the reference clocks are
      "refclk" for the SoCs osciallator input on all SoCs,
    and SoC-specific input clocks for
      BG2/BG2CD: "video_ext0" for the external video clock input

Clocks provided by core clocks shall be referenced by a clock specifier
indexing one of the provided clocks. Refer to dt-bindings/clock/berlin<soc>.h
for the corresponding index mapping.

Example:

chip: chip-control@ea0000 {
	compatible = "marvell,berlin2-chip-ctrl";
	#clock-cells = <1>;
	reg = <0xea0000 0x400>;
	clocks = <&refclk>, <&externaldev 0>;
	clock-names = "refclk", "video_ext0";
};