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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,qca8k-nsscc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm NSS Clock & Reset Controller on QCA8386/QCA8084
maintainers:
- Bjorn Andersson <andersson@kernel.org>
- Luo Jie <quic_luoj@quicinc.com>
description: |
Qualcomm NSS clock control module provides the clocks and resets
on QCA8386(switch mode)/QCA8084(PHY mode)
See also::
include/dt-bindings/clock/qcom,qca8k-nsscc.h
include/dt-bindings/reset/qcom,qca8k-nsscc.h
properties:
compatible:
oneOf:
- const: qcom,qca8084-nsscc
- items:
- enum:
- qcom,qca8082-nsscc
- qcom,qca8085-nsscc
- qcom,qca8384-nsscc
- qcom,qca8385-nsscc
- qcom,qca8386-nsscc
- const: qcom,qca8084-nsscc
clocks:
items:
- description: Chip reference clock source
- description: UNIPHY0 RX 312P5M/125M clock source
- description: UNIPHY0 TX 312P5M/125M clock source
- description: UNIPHY1 RX 312P5M/125M clock source
- description: UNIPHY1 TX 312P5M/125M clock source
- description: UNIPHY1 RX 312P5M clock source
- description: UNIPHY1 TX 312P5M clock source
reg:
items:
- description: MDIO bus address for Clock & Reset Controller register
reset-gpios:
description: GPIO connected to the chip
maxItems: 1
required:
- compatible
- clocks
- reg
- reset-gpios
allOf:
- $ref: qcom,gcc.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
mdio {
#address-cells = <1>;
#size-cells = <0>;
clock-controller@18 {
compatible = "qcom,qca8084-nsscc";
reg = <0x18>;
reset-gpios = <&tlmm 51 GPIO_ACTIVE_LOW>;
clocks = <&pcs0_pll>,
<&qca8k_uniphy0_rx>,
<&qca8k_uniphy0_tx>,
<&qca8k_uniphy1_rx>,
<&qca8k_uniphy1_tx>,
<&qca8k_uniphy1_rx312p5m>,
<&qca8k_uniphy1_tx312p5m>;
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
};
};
...
|
