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|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/display/bridge/cdns,dsi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Cadence DSI bridge
maintainers:
- Boris Brezillon <boris.brezillon@bootlin.com>
description: |
CDNS DSI is a bridge device which converts DPI to DSI
properties:
compatible:
enum:
- cdns,dsi
- ti,j721e-dsi
reg:
minItems: 1
items:
- description:
Register block for controller's registers.
- description:
Register block for wrapper settings registers in case of TI J7 SoCs.
clocks:
items:
- description: PSM clock, used by the IP
- description: sys clock, used by the IP
clock-names:
items:
- const: dsi_p_clk
- const: dsi_sys_clk
phys:
maxItems: 1
phy-names:
const: dphy
interrupts:
maxItems: 1
resets:
maxItems: 1
reset-names:
const: dsi_p_rst
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description:
Output port representing the DSI output. It can have
at most 4 endpoints. The endpoint number is directly encoding
the DSI virtual channel used by this device.
port@1:
$ref: /schemas/graph.yaml#/properties/port
description:
Input port representing the DPI input.
required:
- port@1
allOf:
- $ref: ../dsi-controller.yaml#
- if:
properties:
compatible:
contains:
const: ti,j721e-dsi
then:
properties:
reg:
minItems: 2
maxItems: 2
power-domains:
maxItems: 1
else:
properties:
reg:
maxItems: 1
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- phys
- phy-names
- ports
unevaluatedProperties: false
examples:
- |
bus {
#address-cells = <2>;
#size-cells = <2>;
dsi@fd0c0000 {
compatible = "cdns,dsi";
reg = <0x0 0xfd0c0000 0x0 0x1000>;
clocks = <&pclk>, <&sysclk>;
clock-names = "dsi_p_clk", "dsi_sys_clk";
interrupts = <1>;
phys = <&dphy0>;
phy-names = "dphy";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
endpoint {
remote-endpoint = <&xxx_dpi_output>;
};
};
};
panel@0 {
compatible = "panasonic,vvx10f034n00";
reg = <0>;
power-supply = <&vcc_lcd_reg>;
};
};
};
- |
bus {
#address-cells = <2>;
#size-cells = <2>;
dsi@fd0c0000 {
compatible = "cdns,dsi";
reg = <0x0 0xfd0c0000 0x0 0x1000>;
clocks = <&pclk>, <&sysclk>;
clock-names = "dsi_p_clk", "dsi_sys_clk";
interrupts = <1>;
phys = <&dphy1>;
phy-names = "dphy";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
endpoint@0 {
reg = <0>;
remote-endpoint = <&dsi_panel_input>;
};
};
port@1 {
reg = <1>;
endpoint {
remote-endpoint = <&xxx_dpi_output>;
};
};
};
};
};
|
