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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/arm,pl35x-smc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Arm PL35x Series Static Memory Controller (SMC)
maintainers:
- Miquel Raynal <miquel.raynal@bootlin.com>
- Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>
description: |
The PL35x Static Memory Controller is a bus where you can connect two kinds
of memory interfaces, which are NAND and memory mapped interfaces (such as
SRAM or NOR) depending on the specific configuration.
The TRM is available here:
https://documentation-service.arm.com/static/5e8e2524fd977155116a58aa
# We need a select here so we don't match all nodes with 'arm,primecell'
select:
properties:
compatible:
contains:
enum:
- arm,pl353-smc-r2p1
- arm,pl354
required:
- compatible
properties:
$nodename:
pattern: "^memory-controller@[0-9a-f]+$"
compatible:
items:
- enum:
- arm,pl353-smc-r2p1
- arm,pl354
- const: arm,primecell
"#address-cells":
const: 2
"#size-cells":
const: 1
reg:
items:
- description:
Configuration registers for the host and sub-controllers.
The three chip select regions are defined in 'ranges'.
clocks:
minItems: 1
maxItems: 2
clock-names:
minItems: 1
maxItems: 2
ranges:
minItems: 1
maxItems: 8
interrupts:
minItems: 1
items:
- description: Combined or Memory interface 0 IRQ
- description: Memory interface 1 IRQ
patternProperties:
"@[0-7],[a-f0-9]+$":
type: object
description: |
The child device node represents the controller connected to the SMC
bus. The controller can be a NAND controller or a pair of any memory
mapped controllers such as NOR and SRAM controllers.
properties:
compatible:
description:
Compatible of memory controller.
reg:
items:
- items:
- description: |
Chip-select ID, as in the parent range property.
minimum: 0
maximum: 7
- description: |
Offset of the memory region requested by the device.
- description: |
Length of the memory region requested by the device.
required:
- compatible
- reg
required:
- compatible
- reg
- clock-names
- clocks
additionalProperties: false
allOf:
- if:
properties:
compatible:
contains:
const: arm,pl354
then:
properties:
clocks:
# According to TRM, really should be 3 clocks
maxItems: 1
clock-names:
const: apb_pclk
else:
properties:
clocks:
items:
- description: clock for the memory device bus
- description: main clock of the SMC
clock-names:
items:
- const: memclk
- const: apb_pclk
examples:
- |
smcc: memory-controller@e000e000 {
compatible = "arm,pl353-smc-r2p1", "arm,primecell";
reg = <0xe000e000 0x0001000>;
clock-names = "memclk", "apb_pclk";
clocks = <&clkc 11>, <&clkc 44>;
ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
#address-cells = <2>;
#size-cells = <1>;
nfc0: nand-controller@0,0 {
compatible = "arm,pl353-nand-r2p1";
reg = <0 0 0x1000000>;
#address-cells = <1>;
#size-cells = <0>;
};
};
|
