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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/thead,th1520-gmac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: T-HEAD TH1520 GMAC Ethernet controller
maintainers:
- Drew Fustini <dfustini@tenstorrent.com>
description: |
The TH1520 GMAC is described in the TH1520 Peripheral Interface User Manual
https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Features include
- Compliant with IEEE802.3 Specification
- IEEE 1588-2008 standard for precision networked clock synchronization
- Supports 10/100/1000Mbps data transfer rate
- Supports RGMII/MII interface
- Preamble and start of frame data (SFD) insertion in Transmit path
- Preamble and SFD deletion in the Receive path
- Automatic CRC and pad generation options for receive frames
- MDIO master interface for PHY device configuration and management
The GMAC Registers consists of two parts
- APB registers are used to configure clock frequency/clock enable/clock
direction/PHY interface type.
- AHB registers are use to configure GMAC core (DesignWare Core part).
GMAC core register consists of DMA registers and GMAC registers.
select:
properties:
compatible:
contains:
enum:
- thead,th1520-gmac
required:
- compatible
allOf:
- $ref: snps,dwmac.yaml#
properties:
compatible:
items:
- enum:
- thead,th1520-gmac
- const: snps,dwmac-3.70a
reg:
items:
- description: DesignWare GMAC IP core registers
- description: GMAC APB registers
reg-names:
items:
- const: dwmac
- const: apb
clocks:
items:
- description: GMAC main clock
- description: Peripheral registers interface clock
clock-names:
items:
- const: stmmaceth
- const: pclk
interrupts:
items:
- description: Combined signal for various interrupt events
interrupt-names:
items:
- const: macirq
required:
- clocks
- clock-names
unevaluatedProperties: false
examples:
- |
gmac0: ethernet@e7070000 {
compatible = "thead,th1520-gmac", "snps,dwmac-3.70a";
reg = <0xe7070000 0x2000>, <0xec003000 0x1000>;
reg-names = "dwmac", "apb";
clocks = <&clk 1>, <&clk 2>;
clock-names = "stmmaceth", "pclk";
interrupts = <66>;
interrupt-names = "macirq";
phy-mode = "rgmii-id";
snps,fixed-burst;
snps,axi-config = <&stmmac_axi_setup>;
snps,pbl = <32>;
phy-handle = <&phy0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};
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