1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
|
# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/remoteproc/ti,pru-rproc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI Programmable Realtime Unit (PRU) cores
maintainers:
- Suman Anna <s-anna@ti.com>
description: |
Each Programmable Real-Time Unit and Industrial Communication Subsystem
(PRU-ICSS or PRUSS) has two 32-bit load/store RISC CPU cores called
Programmable Real-Time Units (PRUs), each represented by a node. Each PRU
core has a dedicated Instruction RAM, Control and Debug register sets, and
use the Data RAMs present within the PRU-ICSS for code execution.
The K3 SoCs containing ICSSG v1.0 (eg: AM65x SR1.0) also have two Auxiliary
PRU cores called RTUs with slightly different IP integration. The K3 SoCs
containing the revised ICSSG v1.1 (eg: J721E, AM65x SR2.0) have an extra two
auxiliary Transmit PRU cores called Tx_PRUs that augment the PRUs. Each RTU
or Tx_PRU core can also be used independently like a PRU, or alongside a
corresponding PRU core to provide/implement auxiliary functionality/support.
Each PRU, RTU or Tx_PRU core node should be defined as a child node of the
corresponding PRU-ICSS node. Each node can optionally be rendered inactive by
using the standard DT string property, "status".
Please see the overall PRU-ICSS bindings document for additional details
including a complete example,
Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml
properties:
compatible:
enum:
- ti,am3356-pru # for AM335x SoC family (AM3356+ SoCs only)
- ti,am4376-pru # for AM437x SoC family (AM4376+ SoCs only)
- ti,am5728-pru # for AM57xx SoC family
- ti,am625-pru # for PRUs in K3 AM62x SoC family
- ti,am642-pru # for PRUs in K3 AM64x SoC family
- ti,am642-rtu # for RTUs in K3 AM64x SoC family
- ti,am642-tx-pru # for Tx_PRUs in K3 AM64x SoC family
- ti,am654-pru # for PRUs in K3 AM65x SoC family
- ti,am654-rtu # for RTUs in K3 AM65x SoC family
- ti,am654-tx-pru # for Tx_PRUs in K3 AM65x SR2.0 SoCs
- ti,j721e-pru # for PRUs in K3 J721E SoC family
- ti,j721e-rtu # for RTUs in K3 J721E SoC family
- ti,j721e-tx-pru # for Tx_PRUs in K3 J721E SoC family
- ti,k2g-pru # for 66AK2G SoC family
reg:
items:
- description: Address and Size of the PRU Instruction RAM
- description: Address and Size of the PRU CTRL sub-module registers
- description: Address and Size of the PRU Debug sub-module registers
reg-names:
items:
- const: iram
- const: control
- const: debug
firmware-name:
description: |
Should contain the name of the default firmware image
file located on the firmware search path.
if:
properties:
compatible:
enum:
- ti,am654-rtu
- ti,j721e-rtu
- ti,am642-rtu
then:
properties:
$nodename:
pattern: "^rtu@[0-9a-f]+$"
else:
if:
properties:
compatible:
enum:
- ti,am654-tx-pru
- ti,j721e-tx-pru
- ti,am642-tx-pru
then:
properties:
$nodename:
pattern: "^txpru@[0-9a-f]+"
else:
properties:
$nodename:
pattern: "^pru@[0-9a-f]+$"
required:
- compatible
- reg
- reg-names
- firmware-name
additionalProperties: false
examples:
- |
/* AM33xx PRU-ICSS */
pruss_tm: target-module@300000 { /* 0x4a300000, ap 9 04.0 */
compatible = "ti,sysc-pruss", "ti,sysc";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x300000 0x80000>;
pruss: pruss@0 {
compatible = "ti,am3356-pruss";
reg = <0x0 0x80000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
pruss_mem: memories@0 {
reg = <0x0 0x2000>,
<0x2000 0x2000>,
<0x10000 0x3000>;
reg-names = "dram0", "dram1", "shrdram2";
};
pru0: pru@34000 {
compatible = "ti,am3356-pru";
reg = <0x34000 0x2000>,
<0x22000 0x400>,
<0x22400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am335x-pru0-fw";
};
pru1: pru@38000 {
compatible = "ti,am3356-pru";
reg = <0x38000 0x2000>,
<0x24000 0x400>,
<0x24400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am335x-pru1-fw";
};
};
};
- |
/* AM65x SR2.0 ICSSG */
#include <dt-bindings/soc/ti,sci_pm_domain.h>
icssg0: icssg@b000000 {
compatible = "ti,am654-icssg";
reg = <0xb000000 0x80000>;
power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0xb000000 0x80000>;
icssg0_mem: memories@0 {
reg = <0x0 0x2000>,
<0x2000 0x2000>,
<0x10000 0x10000>;
reg-names = "dram0", "dram1", "shrdram2";
};
pru0_0: pru@34000 {
compatible = "ti,am654-pru";
reg = <0x34000 0x4000>,
<0x22000 0x100>,
<0x22400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-pru0_0-fw";
};
rtu0_0: rtu@4000 {
compatible = "ti,am654-rtu";
reg = <0x4000 0x2000>,
<0x23000 0x100>,
<0x23400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-rtu0_0-fw";
};
tx_pru0_0: txpru@a000 {
compatible = "ti,am654-tx-pru";
reg = <0xa000 0x1800>,
<0x25000 0x100>,
<0x25400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-txpru0_0-fw";
};
pru0_1: pru@38000 {
compatible = "ti,am654-pru";
reg = <0x38000 0x4000>,
<0x24000 0x100>,
<0x24400 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-pru0_1-fw";
};
rtu0_1: rtu@6000 {
compatible = "ti,am654-rtu";
reg = <0x6000 0x2000>,
<0x23800 0x100>,
<0x23c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-rtu0_1-fw";
};
tx_pru0_1: txpru@c000 {
compatible = "ti,am654-tx-pru";
reg = <0xc000 0x1800>,
<0x25800 0x100>,
<0x25c00 0x100>;
reg-names = "iram", "control", "debug";
firmware-name = "am65x-txpru0_1-fw";
};
};
|