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| author | fisher.yu <fisher.yu@arm.com> | 2023-10-17 10:10:34 +0200 |
|---|---|---|
| committer | Tomas Mraz <tomas@openssl.org> | 2023-11-29 18:10:31 +0100 |
| commit | cc82b09cbde0b809d37c23cb1ef9f1f41fc7f959 (patch) | |
| tree | ea95cee05b1404d1b47dfb4fa0e571ec7096ff10 /crypto/armcap.c | |
| parent | Add last missing TLSA usage/selector/mtype test case (diff) | |
| download | openssl-cc82b09cbde0b809d37c23cb1ef9f1f41fc7f959.tar.xz openssl-cc82b09cbde0b809d37c23cb1ef9f1f41fc7f959.zip | |
Optimize AES-CTR for ARM Neoverse V1 and V2.
Unroll AES-CTR loops to a maximum 12 blocks for ARM Neoverse V1 and
V2, to fully utilize their AES pipeline resources.
Improvement on ARM Neoverse V1.
Package Size(Bytes) 16 32 64 128 256 1024
Improvement(%) 3.93 -0.45 11.30 4.31 12.48 37.66
Package Size(Bytes) 1500 8192 16384 61440 65536
Improvement(%) 37.16 38.90 39.89 40.55 40.41
Change-Id: Ifb8fad9af22476259b9ba75132bc3d8010a7fdbd
Reviewed-by: Tom Cosgrove <tom.cosgrove@arm.com>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/22733)
Diffstat (limited to 'crypto/armcap.c')
| -rw-r--r-- | crypto/armcap.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/crypto/armcap.c b/crypto/armcap.c index b13da3be81..adb8b6a188 100644 --- a/crypto/armcap.c +++ b/crypto/armcap.c @@ -421,6 +421,10 @@ void OPENSSL_cpuid_setup(void) MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V2)) && (OPENSSL_armcap_P & ARMV8_SHA3)) OPENSSL_armcap_P |= ARMV8_UNROLL8_EOR3; + if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V1) || + MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_ARM, ARM_CPU_PART_V2)) && + (OPENSSL_armcap_P & ARMV8_SHA3)) + OPENSSL_armcap_P |= ARMV8_UNROLL12_EOR3; if ((MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM) || MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_ICESTORM) || MIDR_IS_CPU_MODEL(OPENSSL_arm_midr, ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M1_FIRESTORM_PRO) || |