summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
diff options
context:
space:
mode:
authorSean Anderson <sean.anderson@seco.com>2021-08-10 00:38:11 +0200
committerStephen Boyd <sboyd@kernel.org>2021-08-29 08:46:21 +0200
commit275e4e2dc0411508506acb591a45daf01d22f8eb (patch)
treee0984266b6e9756256212529de417186bb9aa81a /Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
parentLinux 5.14-rc1 (diff)
downloadlinux-275e4e2dc0411508506acb591a45daf01d22f8eb.tar.xz
linux-275e4e2dc0411508506acb591a45daf01d22f8eb.zip
dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
These properties allow configuring the SD/OE pin as described in the datasheet. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net> Link: https://lore.kernel.org/r/20210809223813.3766204-1-sean.anderson@seco.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/idt,versaclock5.yaml')
-rw-r--r--Documentation/devicetree/bindings/clock/idt,versaclock5.yaml40
1 files changed, 40 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
index 26ed040bc717..ffd6ae0eed64 100644
--- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
+++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
@@ -30,6 +30,20 @@ description: |
3 -- OUT3
4 -- OUT4
+ The idt,shutdown and idt,output-enable-active properties control the
+ SH (en_global_shutdown) and SP bits of the Primary Source and Shutdown
+ Register, respectively. Their behavior is summarized by the following
+ table:
+
+ SH SP Output when the SD/OE pin is Low/High
+ == == =====================================
+ 0 0 Active/Inactive
+ 0 1 Inactive/Active
+ 1 0 Active/Shutdown
+ 1 1 Inactive/Shutdown
+
+ The case where SH and SP are both 1 is likely not very interesting.
+
maintainers:
- Luca Ceresoli <luca@lucaceresoli.net>
@@ -64,6 +78,26 @@ properties:
maximum: 22760
description: Optional load capacitor for XTAL1 and XTAL2
+ idt,shutdown:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1]
+ description: |
+ If 1, this enables the shutdown functionality: the chip will be
+ shut down if the SD/OE pin is driven high. If 0, this disables the
+ shutdown functionality: the chip will never be shut down based on
+ the value of the SD/OE pin. This property corresponds to the SH
+ bit of the Primary Source and Shutdown Register.
+
+ idt,output-enable-active:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1]
+ description: |
+ If 1, this enables output when the SD/OE pin is high, and disables
+ output when the SD/OE pin is low. If 0, this disables output when
+ the SD/OE pin is high, and enables output when the SD/OE pin is
+ low. This corresponds to the SP bit of the Primary Source and
+ Shutdown Register.
+
patternProperties:
"^OUT[1-4]$":
type: object
@@ -90,6 +124,8 @@ required:
- compatible
- reg
- '#clock-cells'
+ - idt,shutdown
+ - idt,output-enable-active
allOf:
- if:
@@ -139,6 +175,10 @@ examples:
clocks = <&ref25m>;
clock-names = "xin";
+ /* Set the SD/OE pin's settings */
+ idt,shutdown = <0>;
+ idt,output-enable-active = <0>;
+
OUT1 {
idt,mode = <VC5_CMOSD>;
idt,voltage-microvolt = <1800000>;