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| author | Anup Patel <apatel@ventanamicro.com> | 2024-10-20 21:47:32 +0200 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2024-10-28 12:14:03 +0100 |
| commit | 68c72a6557b072bff79658b9c0fdb0e69148e32d (patch) | |
| tree | ea5948f1ff14a011f397766621575914b011ec54 /arch/riscv/include/asm/cpufeature.h | |
| parent | RISC-V: KVM: Use nacl_csr_xyz() for accessing AIA CSRs (diff) | |
| download | linux-68c72a6557b072bff79658b9c0fdb0e69148e32d.tar.xz linux-68c72a6557b072bff79658b9c0fdb0e69148e32d.zip | |
RISC-V: KVM: Use SBI sync SRET call when available
Implement an optimized KVM world-switch using SBI sync SRET call
when SBI nested acceleration extension is available. This improves
KVM world-switch when KVM RISC-V is running as a Guest under some
other hypervisor.
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20241020194734.58686-12-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'arch/riscv/include/asm/cpufeature.h')
0 files changed, 0 insertions, 0 deletions