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| author | Anusha Srivatsa <anusha.srivatsa@intel.com> | 2018-10-31 01:19:17 +0100 |
|---|---|---|
| committer | Manasi Navare <manasi.d.navare@intel.com> | 2018-10-31 22:05:08 +0100 |
| commit | 35b876db4a425e58d7fe63eb363bbfa50b8e4e74 (patch) | |
| tree | 10cba1f39e2adf289b4946bda1ef82298a95c490 /include | |
| parent | drm/i915/icl: Program HS_TX_TIMEOUT/LP_RX_TIMEOUT/TA_TIMEOUT registers (diff) | |
| download | linux-35b876db4a425e58d7fe63eb363bbfa50b8e4e74.tar.xz linux-35b876db4a425e58d7fe63eb363bbfa50b8e4e74.zip | |
drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming
Add the newly added slice_row_per_frame parameter
in the Picture Parameter Set registers.
This defines the number of vertically stacked slices
in a frame.
Credits to Manasi for noticing bSpec change.
Suggested-by: Manasi Navare <manasi.d.navare@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181031001923.31442-1-manasi.d.navare@intel.com
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions