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authorQipan Li <Qipan.Li@csr.com>2014-04-14 08:29:59 +0200
committerMark Brown <broonie@linaro.org>2014-04-14 22:03:34 +0200
commit6ee8a2f7d5e78700b6e64799b5e9976b21cfad79 (patch)
tree8b0eae032373d5e8369a732f279c0217574049b2 /net/compat.c
parentspi: sirf: set SPI controller in RISC IO chipselect mode (diff)
downloadlinux-6ee8a2f7d5e78700b6e64799b5e9976b21cfad79.tar.xz
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spi: sirf: make GPIO chipselect function work well
orignal GPIO chipslect is not standard because it don't take care to the chipselect signal: BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'net/compat.c')
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