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Author
Age
Files
Lines
*
riscv: cpufeature: Extract common elements from extension checking
Charlie Jenkins
2024-07-23
1
-34
/
+44
*
riscv: Extend cpufeature.c to detect vendor extensions
Charlie Jenkins
2024-07-23
1
-0
/
+25
*
riscv: add ISA extensions validation callback
Clément Léger
2024-06-26
1
-0
/
+1
*
Merge tag 'riscv-for-linus-6.9-mw2' of git://git.kernel.org/pub/scm/linux/ker...
Linus Torvalds
2024-03-22
1
-12
/
+19
|
\
|
*
riscv: Set unaligned access speed at compile time
Charlie Jenkins
2024-03-13
1
-11
/
+13
|
*
riscv: Decouple emulated unaligned accesses from access speed
Charlie Jenkins
2024-03-13
1
-1
/
+1
|
*
riscv: lib: Introduce has_fast_unaligned_access()
Charlie Jenkins
2024-03-13
1
-3
/
+8
*
|
work around gcc bugs with 'asm goto' with outputs
Linus Torvalds
2024-02-10
1
-2
/
+2
|
/
*
Merge patch series "riscv: Add fine-tuned checksum functions"
Palmer Dabbelt
2024-01-18
1
-0
/
+2
|
\
|
*
riscv: Add static key for misaligned accesses
Charlie Jenkins
2024-01-18
1
-0
/
+2
*
|
riscv: add ISA extension parsing for scalar crypto
Evan Green
2023-12-13
1
-1
/
+3
|
/
*
riscv: Rearrange hwcap.h and cpufeature.h
Xiao Wang
2023-11-09
1
-0
/
+83
*
RISC-V: Probe misaligned access speed in parallel
Evan Green
2023-11-08
1
-1
/
+0
*
Merge patch series "Add support to handle misaligned accesses in S-mode"
Palmer Dabbelt
2023-11-05
1
-0
/
+18
|
\
|
*
riscv: report misaligned accesses emulation to hwprobe
Clément Léger
2023-11-01
1
-0
/
+18
*
|
RISC-V: Enable cbo.zero in usermode
Andrew Jones
2023-09-21
1
-0
/
+1
|
/
*
RISC-V: Probe for unaligned access speed
Evan Green
2023-09-01
1
-0
/
+2
*
RISC-V: Track ISA extensions per hart
Evan Green
2023-06-19
1
-0
/
+10
*
RISC-V: hwprobe: Support probing of misaligned access performance
Evan Green
2023-04-19
1
-0
/
+2
*
RISC-V: Move struct riscv_cpuinfo to new header
Evan Green
2023-04-19
1
-0
/
+21