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path: root/drivers/gpu/drm/i915/display/intel_display_power.h (follow)
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* drm/i915: use NULL for zero wakeref_t instead of plain integer 0Jani Nikula2024-10-041-2/+2
* drm/i915: use INTEL_WAKEREF_DEF instead of magic -1 for intel_wakeref_tJani Nikula2024-09-301-2/+2
* drm/i915: make intel_display_power_domain_str() staticJani Nikula2024-08-161-3/+0
* drm/i915: make __intel_display_power_is_enabled() staticJani Nikula2024-08-141-2/+0
* drm/i915/display: Remove unused POWER_DOMAIN_MODESETGustavo Sousa2023-08-211-1/+0
* drm/i915: Add way to specify the power-off delay of a display power domainImre Deak2023-06-261-3/+23
* drm/i915: Remove redundant forward declarations from display power headersImre Deak2023-06-261-3/+0
* drm/i915: Add missing forward declarations/includes to display power headersImre Deak2023-06-261-0/+4
* drm/i915: Remove i915_drm_suspend_modeMaarten Lankhorst2023-06-021-2/+1
* drm/i915/power: move dc state members to struct i915_power_domainsJani Nikula2023-03-061-0/+4
* drm/i915/tgl+: Enable display DC power states on all eDP portsImre Deak2022-11-181-0/+7
* drm/i915: Move the POWER_DOMAIN_AUX_IO_A definition to its logical placeImre Deak2022-11-181-2/+3
* drm/i915: reduce includes in intel_display_power.hJani Nikula2022-11-031-1/+2
* drm/i915: Remove the XELPD specific AUX and DDI power domainsImre Deak2022-04-201-9/+0
* drm/i915: Remove the ICL specific TBT power domainsImre Deak2022-04-201-4/+0
* drm/i915: Remove the aliasing of power domain enum valuesImre Deak2022-04-201-19/+7
* drm/i915: Sanitize the port -> DDI/AUX power domain mapping for each platformImre Deak2022-04-201-0/+12
* drm/i915: Convert the u64 power well domains mask to a bitmapImre Deak2022-04-201-7/+11
* drm/i915: Rename the power domain names to end with pipes/portsImre Deak2022-04-201-36/+36
* drm/i915: Unexport the for_each_power_well() macrosImre Deak2022-04-201-20/+0
* drm/i915: Move per-platform power well hooks to intel_display_power_well.cImre Deak2022-04-201-5/+0
* drm/i915: Move intel_display_power_well_is_enabled() to intel_display_power_w...Imre Deak2022-02-281-26/+0
* drm/i915: Fix the VDSC_PW2 power domain enum valueImre Deak2022-02-281-2/+9
* drm/i915: Disable unused power wells left enabled by BIOSImre Deak2022-02-031-0/+1
* drm/i915: Only include i915_reg.h from .c filesMatt Roper2022-02-021-1/+0
* drm/i915: drop intel_display.h include from intel_display_power.hJani Nikula2021-11-191-1/+2
* drm/i915: move structs from intel_display_power.h to .cJani Nikula2021-11-191-94/+1
* drm/i915/debugfs: move debug printing to intel_display_power.cJani Nikula2021-11-191-0/+2
* drm/i915/display: Rename POWER_DOMAIN_DPLL_DC_OFF to POWER_DOMAIN_DC_OFFJosé Roberto de Souza2021-10-201-1/+1
* drm/i915: Introduce with_intel_display_power_if_enabled()Ville Syrjälä2021-09-151-0/+4
* drm/i915/dg1: Adjust the AUDIO power domainAnshuman Gupta2021-08-021-1/+2
* drm/i915/display: remove explicit CNL handling from intel_display_power.cLucas De Marchi2021-07-301-2/+0
* drm/i915/dg2: Add dbuf programmingMatt Roper2021-07-221-0/+4
* drm/i915/dg2: Don't wait for AUX power well enable ACKsMatt Roper2021-07-221-0/+6
* drm/i915/xelpd: Add XE_LPD power wellsMatt Roper2021-05-131-0/+9
* drm/i915/xelpd: add XE_LPD display characteristicsMatt Roper2021-05-071-0/+2
* drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain namesImre Deak2021-02-241-0/+32
* drm/i915: Make intel_display_power_put_unchecked() an internal-only functionImre Deak2020-12-031-2/+3
* drm/i915: Track power reference taken to disable power well functionalityImre Deak2020-12-031-0/+1
* drm/i915: Rename power_domains.wakeref to init_wakerefImre Deak2020-12-031-1/+1
* drm/i915: Factor out helpers to get/put a set of tracked power domainsImre Deak2020-12-031-0/+29
* drm/i915/dg1: Add DG1 power wellsLucas De Marchi2020-10-151-0/+1
* drm/i915/cnl: skip PW_DDI_F on certain skusLucas De Marchi2020-10-151-0/+2
* drm/i915: Introduce for_each_dbuf_slice_in_mask macroStanislav Lisovskiy2020-05-211-0/+1
* drm/i915: Unify the low level dbuf codeVille Syrjälä2020-05-151-3/+3
* drm/i915/tc/tgl: Implement TC cold sequencesJosé Roberto de Souza2020-04-181-0/+1
* drm/i915: Add i915_lpsp_status debugfs attributeAnshuman Gupta2020-04-171-0/+2
* drm/i915: Power well id for ICL PG3Anshuman Gupta2020-04-171-1/+1
* drm/i915/tgl: Allow DC5/DC6 entry while PG2 is activeMatt Roper2020-02-271-0/+1
* drm/i915: Introduce parameterized DBUF_CTLStanislav Lisovskiy2020-02-051-0/+5
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